05-17-2016, 11:25 AM
SystemVerilog Verification -2: Object Oriented Programming
This course teaches the SystemVerilog language used in the VLSI industry for System-On-Chip design verification. This is primarily focusing on the Object Oriented Programming (OOPs / OOP) concepts of SystemVerilog.
https://www.udemy.com/systemverilog-verification-2-object-oriented-programming/
Part 1 of this course is here:
https://www.udemy.com/system_verilog_part_1/
If we enroll, lets make sure we don't wait until next year to begin this...
This course teaches the SystemVerilog language used in the VLSI industry for System-On-Chip design verification. This is primarily focusing on the Object Oriented Programming (OOPs / OOP) concepts of SystemVerilog.
https://www.udemy.com/systemverilog-verification-2-object-oriented-programming/
Part 1 of this course is here:
https://www.udemy.com/system_verilog_part_1/
If we enroll, lets make sure we don't wait until next year to begin this...